The present invention relates to an electrode wiring board having at least two electrode wiring layers formed to sandwich an insulating layer, and a display device using the same.
In recent years, as a display device using a liquid crystal, a display device or a liquid-crystal display (LCD) device which aims at a television display, a graphic display, and the like and has a large capacity and a high integration density is energetically developed and practically used. Not only a simple matrix type liquid-crystal display device which drives a liquid crystal by simply applying a voltage across a display electrode, i.e., a counter electrode and a display pixel electrode in a time sharing manner, but also a so-called an active matrix type in which a switching element is incorporated in each pixel to obtain a high-quality image has been developed in recent years and has been practically used.
In order to advance the spread of the active matrix type liquid-crystal display device, the price must be lowered by increasing a manufacturing yield.
Although there are several means for increasing the manufacturing yield, as one of them, a means for reducing a rate of generation of visible defects by electrostatic breakdown damage in the manufacturing steps can be brought. Conventional various measures are taken against the electrostatic breakdown damage.
In an active matrix type liquid-crystal display device subjected to the conventional counter measure against static electricity and using a thin film transistor as a switching element, the following method is known. That is, a ring-like conductive pattern called a short ring is arranged around a display cell formation region, so that all scanning lines, storage capacitance lines, and signal lines are rendered conductive.
FIG. 15 is a plan view showing the outline of a conventional TFT array substrate in a state wherein a short ring is formed during a manufacturing step. Referring to FIG. 15, a plurality of scanning lines 11 and storage capacitance lines 12 are formed in a same layer on a glass substrate 10 such that each storage capacitance line 12 is arranged between the scanning lines 11 to be parallel to the scanning lines 11.
Pixel electrodes 13 arranged in a matrix are formed over the storage capacitance line 12 through an insulating film. After another insulating film is formed on the entire surface of the resultant structure, a plurality of signal lines 14 are formed in a direction traversing each the scanning line 11 and the storage capacitance line 12.
Scanning line test electrodes 15, feeding electrodes 16, and storage capacitance line test electrodes 17 are formed outside a pixel electrode formation region.
The scanning lines 11, the storage capacitance lines 12, and the signal lines 14 are electrically connected to each other on a stage in the manufacturing steps by a short ring 18 formed around a display cell formation region. The connection portions among the short ring 18, the scanning lines 11, the storage capacitance lines 12, and the signal lines 14 are cut off on the final stage of the manufacturing steps.
In this manner, when all the scanning lines 11, the storage capacitance lines 12, and the signal lines 14 are rendered conductive by the short ring 18, a TFT array substrate of the active matrix type liquid-crystal display device prevents a potential difference from being generated between the lines even if static electricity is charged after formation of the short ring. For this reason, electrostatic breakdown damage does not occur.
However, in fact, static electricity is frequently charged in the step before the step of forming the short ring. In this case, since a large potential difference is generated between lines, the electrostatic breakdown damage occurs in a wiring structure or an insulating film formed before the step of forming a short ring on the TFT array substrate.
For example, in the step before the step of forming the short ring 18 shown in FIG. 15, the scanning lines 11, the storage capacitance lines 12, and the test electrodes 15 and 17 connected to these lines are formed. Thereafter, a resist for performing a photoetching operation for forming another pattern is coated on the substrate 10, and heating is performed on the planar stage for evaporating the solvent of the resist.
After the heating step, as shown in FIG. 16, the TFT array substrate 10 is moved on a conveyer belt 22 while being floated by a plurality of conveyer rollers 21 from the conveyer belt 22 to be conveyed to the next step. When the TFT array substrate 10 is conveyed while being floated by the plurality of convey rollers 21, static electricity of, e.g., several thousands volts is charged between the TFT array substrate 10 and the conveyer belt 22 by peeling charge.
In this case, as shown in FIG. 16, the conveying position of the TFT array substrate 10 is corrected by metal arms 23 connected to the conveyer belt 22. At this time, charges accumulated in the TFT array substrate 10 rapidly move toward the metal arm 23 by the contact between the metal arm 23 and the TFT array substrate 10, so that electrostatic breakdown damage occurs in the wiring structure or insulating film of the TFT array substrate 10.
More specifically, as shown in FIG. 17, in a state wherein a region 24 serving as a part of the TFT array substrate 10 is charged by negative static electricity of several thousands volts, when the grounded metal arm 23 is brought into contact with the region 24, the negative charges rapidly move from the region 24 of the TFT array substrate 10 to the metal arm 23 to cause discharging to occur.
At this time, electrostatic charges on a scanning line 11a or a storage capacitance line 12a arranged at a position near the charge region 24 of the TFT array substrate 10 transmits a scanning line 11b arranged between the scanning line 11a or the storage capacitance line 12a and the metal arm 23 rapidly, so that the charges rapidly move in an insulating film such as an insulating interlayer or a thin film semiconductor layer 26 in a discharging state.
Here, in FIG. 17, the position of a signal line 14a to be formed in the subsequent; step is indicated by a two-dash line. Therefore, when such discharging occurs after the signal line 14a is formed, charges may flow from the scanning line 11a or the storage capacitance line 12a to the metal arm 23 through the signal line 14a. As a result, the insulating states between the scanning line 11a and the signal line 14a and between the storage capacitance line 12a and the signal line 14a are broken.
As the result of the discharging, as shown in FIG. 18, discharging occurs between the scanning line 11a and the metal arm 23 shown in FIG. 17, and a pinhole-like or crack-like damaged portion 27 is formed by the electrostatic breakdown along the discharging, in the insulting film 25 and thin film semiconductor layer 26 formed on the scanning line 11a. When the signal line 14a is formed on the damaged portion 27 in the subsequent step, as shown in FIG. 19, the signal line 14a and the scanning line 11a are short-circuited to each other through the damaged portion 27. For this reason, a visible defect such as a line defect occurs in a pixel array during a display operation upon completion of the display device.
There is provided an active matrix type liquid-crystal display device which is subjected to a counter measure against electrostatic breakdown damage by forming discharging projections in an electrode wiring layer adjacent to each other without using a short ring.
For example, as disclosed in U.S. Pat. No. 5,677,745, a display device having the following arrangement is known. That is, a TFT is used as a switching element, and a signal line is constituted by a laminated structure including at least a semiconductor layer and a metal layer. The outer shapes of the respective layers are almost equal to each other, and a display pixel electrode is located on the uppermost layer. Test electrodes for a scanning line and an storage capacitance line are located at opposing positions, and projections for inducing discharging of static charges between the scanning and capacitive lines are formed.
This prior art will be described below according to a manufacturing process shown in FIG. 22 with reference to FIGS. 20, 21 and 23.
In the first step S1, after a Ta film is formed on an insulating substrate 31 by a sputtering method to have a thickness of 3,000 angstrom (A), as shown in FIG. 20, gate electrodes G, scanning lines 32a to 32c, storage capacitance lines 33a to 33c, and test electrodes 34a to 34c and 36a to 36d connected to the lines and having projections 37a to 37l for inducing discharging static electricity are processed by photo-etching to have predetermined shapes.
FIG. 21 shows a sectional view obtained by cutting the structure along a 21xe2x80x9421 line in FIG. 20 when viewed in a direction indicated by arrows. Referring to FIG. 21, a gap d between the electrodes 37l and 37m is a portion operating as a discharging gap, and its size is set such that discharging is caused by a high voltage of several thousands volts generated by static electricity generated across the gap in the manufacturing step, but discharging is not caused by a voltage of several tens volts at most applied in an ordinary use state after the device is shipped as a product.
After a pattern test for the scanning lines and the storage capacitance lines are performed in step S2, a first insulating film consisting of SiN and having a thickness of 4,000A and an a-Si (amorphous-silicon) film serving as a TFT channel region and having a thickness of 1,000A are formed on the entire surface of the substrate 31 by a CVD (Chemical Vapor Deposition) method in steps S3 and S4.
After an etching protective film for a TFT channel consisting of SiN is formed by the same CVD method in step S5 to have a thickness of 2,000A, only the protective film is processed by photo-etching to have a predetermined pattern shape.
An n+-type a-Si film is formed by the CVD method to have a thickness of 1,000A in step S6, and a film is formed by an Al (aluminum) sputtering method to have a thickness of 5,000A. Thereafter, the a-Si film, the n+-type a-Si film, and the Al film are processed by photo-etching to have predetermined shapes, thereby forming a TFT channel, source and drain electrodes, a signal line, an storage capacitance line feeding wiring, and another signal line layer.
A second insulating film consisting of SiN is formed by a CVD method to have a thickness of 2,000A. The first and second insulating films are processed by photo-etching to have predetermined shapes in step S8, thereby exposing feeding electrodes for scanning lines, storage capacitance lines, and signal lines, forming connection means of a source electrode and a display pixel electrode, and forming connection means of a scanning line layer and a signal line layer.
After an ITO film is formed on the entire surface of the substrate by sputtering to have a thickness of 1,000A in step S9, the display pixel electrode 13, and the pixel electrode layer connection wiring are processed by photo-etching to have a predetermined shape. A plan view of the outline of the electrode wiring board obtained at this time is shown in FIG. 23. In this manner, an array substrate is completed.
When the above-mentioned array substrate having the short ring is used in an LCD device without any change, the short ring hinders a display operation. For this reason, all the short rings must be cut off. In addition, cut off of the short ring is not performed after the display device is completed but is performed during the manufacturing step of the display device, i.e., when the array substrate is completed. Therefore, a visible defect caused by electrostatic breakdown cannot be prevented from occurring after the cutting off.
A method of forming discharging projections between the electrode wirings is relatively easily realized between the electrode wirings formed on, so called, the same layer formed in one step. However, when two electrode wirings are formed in different steps, and an insulating interlayer or the like is formed between the two electrode wirings, it is very difficult to specially form an electric connection for preventing discharging from being generated between the electrode wirings.
In conventional manufacturing steps, since an array substrate is formed through the step of forming a scanning line layer (S1), the insulating film forming step (S3), the signal line layer forming step (S4), the protective film forming step (S5), the insulating film processing step for forming various electrodes, and the pixel electrode layer forming step (S9) in the order named, it is difficult to directly electrically connect a scanning line layer formed first to a signal line layer subsequently formed because a conductive film or an insulating film is formed between the scanning line layer and the signal line layer.
For example, in order to electrically connect both the layers to each other, the layers must be connected to each other through the connection wiring of the pixel electrode layer formed on the uppermost layer in the final step (S9). For this reason, in the step before the pixel electrode layer is formed, the scanning line layer and the signal line are electrically insulated from each other. As a result, when the substrate 31 is charged by static electricity in the steps performed from the step of forming a scanning line layer (S1) to the step of forming a pixel electrode layer (S9), electrostatic breakdown damage caused by discharging of static charges easily occurs between the scanning line layer 32a and a signal line 6, as shown in FIG. 23.
It is, therefore, an object of the present invention to provide an electrode wiring board in which, dielectric breakdown between two electrode wirings formed on an insulating substrate in different steps of manufacturing steps can be prevented in a subsequent manufacturing step, and a manufacturing yield can be increased and a display device using the electrode wiring board.
An electrode wiring board according to the present invention comprises an insulating substrate, a first electrode wiring formed on the insulating substrate, an insulating layer formed on the first electrode wiring, and a second electrode wiring formed on the insulating layer, wherein the first and second electrode wirings have discharging portions located at positions which oppose through the insulating layer.
A display device according to the present invention includes: a pixel electrode array substrate having a plurality of scanning lines formed on an insulating substrate, an insulating layer formed on the scanning lines, signal lines arranged on the insulating layer arranged in a direction crossing to that of the scanning lines each other, and pixel electrodes arranged in each crossing point formed by the plurality of scanning lines and the signal lines crossing to each other through the insulating layer; a counter substrate opposing the pixel electrode array substrate; and a light modulation layer held between the pixel electrode array substrate and the counter substrate,
wherein discharging portions are formed at parts of the scanning lines and the signal lines which oppose through the insulating layer in a region outside a region in which the pixel electrodes are formed.
With the above arrangement, electrostatic breakdown damage caused by discharging of electrostatic charges accumulated in steps performed from the step of forming a scanning line layer to the step of forming a pixel electrode layer in the region, in which the pixel electrode is formed, between the two electrode wirings, which are formed on the insulting substrate in different steps of the manufacturing steps, e.g., the scanning line layer and the signal line layer can be suppressed, and a manufacturing yield can be improved.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.